programmable cas ddr3 synchronous dram

Brand Name:SKHYINX

Model Number:H5TC2G63GFR-PBA

Place of Origin:TAIWAN

... Rate III (DDR3) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth. SK Hynix 2Gb DDR3 SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock.

Brand Name:Anterwell

Model Number:MT48LC32M8A2

Place of Origin:original factory

... Features • PC100- and PC133-compliant • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for ...

Brand Name:Micron Technology Inc.

Model Number:MT41K256M8DA-107:K

MT41K256M8DA-107:K High-Performance 8GB DDR3 Synchronous DRAM Flash Memory Chips MT41K256M8DA-107:K Flash Memory Chips Product Description: The MT41K256M8DA-107:K Flash Memory Chips is a high-performance memory designed for embedded applications. It offers...

Model Number:MT48LC32M8A2

Place of Origin:original factory

... Features • PC100- and PC133-compliant • Fully synchronous; all signals registered on positive edge of system clock • Internal pipelined operation; column address can be changed every clock cycle • Internal banks for ...

Brand Name:SAMSUNG

Model Number:K4B2G1646F-BCMA

Place of Origin:KR

...DRAM 2Gb F-die DDR3 SDRAM X16 K4B2G1646F-BCMA JEDEC standard 1.5v + 0.075V Power Supply VDoo = 1.5V + 0.075V 400 MHz fcx for 800Mbsec'pin, 533MHz fck for 1066Mb'sec/pin,667MHz fck for 1333Mbsec'pin,800MHz fck for 1600Mb'sec'pin,933MHz fck for 1866Mb'sec'pin, 1066MHz fck for 2133Mb'secpin 8 Banks Programmable CAs Latency(posted CAS): 5.6.7,8.9.10.11.13.14 Programmable...

Brand Name:Micron Technology Inc.

Model Number:MT41J128M16HA-125 IT:D

... clock inputs (CK, CK#) • 8 internal banks • Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals • Programmable CAS READ latency (CL) • Posted CAS additive latency (AL) • Programmable CAS WRITE latency (CWL)

Brand Name:Original Factory

Model Number:M15T4G16256A-DEBG2C

Place of Origin:CN

...double data rate architecture to achieve high-speed operation. It is internally configured as an eight-bank DRAM. The 4Gb chip is organised into 32Mbit x 16 I/O x 8 memory devices. These synchronous devices achieve high-speed, dual-data-rate data rates of

Categories:Integrated Circuit IC Chip

Country/Region:china

MT41K128M16JT-125 AAT:K Products Description: • VDD = VDDQ = 1.35V (1.283–1.45V) • Backward-compatible to VDD = VDDQ = 1.5V ±0.075V • Differential bidirectional data strobe • 8n-bit prefetch architecture • Differential clock inputs (CK, CK#) • 8 internal ...

Brand Name:OEM/ODM

Place of Origin:China

Model Number:AS4C256M16D3LB-12BIN

Product Description: Programmable IC Chip Our Programmable IC Chip is a data acquisition IC with 8-100 pins that can be programmed from 2.7V to 5.5V. With a wide operating temperature range of -40C to +125C and ESD protection of 2KV HBM, this gate array IC...

Place of Origin:China

Brand Name:BMW CAS AK300 AK300+ V1.5 Key Maker

Model Number:BMW CAS AK300 AK300+ V1.5 Key Maker

BMW CAS AK300 AK300+ V1.5 Key Maker BMW CAS AK300+ Key Maker Firmware Version: 1.16 Software Version:1.50 AK300+ Features: 1 BMW CAS supports a diagnosis of communication directly through the OBD port or through the CAN BUS port security to read and write ...

Brand Name:ISSI

Model Number:IS42S16400F-6TL

...DRAM IS42S16400F-6TL 16 Bit Product Range Memory Data Storage Semiconductors Memory ICs DRAM IS42S16400F-6TL DRAM 64M, 3.3v, SDRAM, 4Mx16 16 bit App Characteristics Clock frequency: 200, 166, 143, 133 MHz Fully synchronous; all signals referenced to a positive clock edge Internal bank for hiding row access/precharge Single 3.3V power supply LVTTL interface Programmable...

Brand Name:Original

Model Number:MT48LC4M32B2P-7:G

Place of Origin:Original

...DRAM Memory ICs LM135AH N87C51FA Semiconductors Features PC100-compliant Fully synchronous; all signals registered on positive edge of system clock Internal pipelined operation; column address can be changed every clock cycle Internal banks for hiding row access/precharge Programmable...